Processors whose computer bus architectures have Direct Memory Access (“DMA”) capability may transfer data between a device attached to the processor (such as disk controllers, graphics cards, etc.) and the processor's system memory independent of the main CPU. DMA allows devices of different speeds to communicate without placing a processing burden on the CPU. DMA further speeds up data transfer by eliminating the fetch and execute cycles required when data transfers pass through the CPU.
In a DMA transfer, the CPU stops its bus activity to allow the DMA operation. A DMA controller then reads or writes memory bytes and transfers the data to the desired location; generally, a DMA transfer involves either a device read and memory write or a memory read and a device write. FIFO buffers may be used to store the data to be transferred.
It would be advantageous to enhance DMA transfer of data.